Publications
Talk · Lecture notes in computer science · January 1, 2020
StocNoC: Accelerating Stochastic Models Through Reconfigurable Network on Chip Architectures
Arshyn Zhanbolatov, Kizheppatt Vipin, Aresh Dadlani, Dmitriy Fedorov
Interconnection Networks and SystemsEmbedded Systems Design TechniquesVLSI and FPGA Design Techniquesnetwork-on-chipFPGAstochastic epidemic model
More by Aresh Dadlani
- Joint Freshness and Age-Dispersion Control over Finite-State Markov Wireless ChannelsarXiv · 2026
- Dynamic Link Prediction with Temporally Enhanced Signed Graph Neural NetworksarXiv · 2026
- DeepIrrigo: Deep Reinforcement Learning for Continuous and Discrete Action Irrigation Optimization--A Case Study in IranSSRN Electronic Journal · 2026
- Age Performance Analysis in Resource-Constrained Adversarial IoT SystemsarXiv · 2025