Skip to content
Publications

Talk · International SoC Design Conference · November 1, 2018

Low Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection

Kamilya Smagulova, Aidana Irmanova, Alex Pappachen James

Abstract

In this paper, we propose XOR based memristive edge detector circuit that is integrated into a near sensor log-linear CMOS pixel. Memristor threshold logic was used to design NAND gates, which serve as a building block for XOR gates. For validation of proposed circuit functionality hardware simulation of logic gates with a pixel pair was conducted using TSMC 0.18um technology and system-level simulation of the proposed circuit using SPICE models. The proposed method operates in low power and takes a small area on chip. The power consumption of one pixel is 1.16uW and total area 36.72 um2without photosensing component. The power consumption of NAND circuit is 1.11pW and total area 32.4um2.

Advanced Memory and Neural ComputingLow-power high-performance VLSI designAnalog and Mixed-Signal Circuit Designmemristive logicXOR gateNAND gate

More by Kamilya Smagulova