Publications
Talk · IEEE International Conference on Electron Devices and Solid-State Circuits · June 1, 2018
Design of CMOS-memristor Circuits for LSTM architecture
Kamilya Smagulova, Kazybek Adam, Olga Krestinskaya, Alex Pappachen James
Abstract
Long Short-Term memory (LSTM) architecture is a well-known approach for building recurrent neural networks (RNN) useful in sequential processing of data in application to natural language processing. The near-sensor hardware implementation of LSTM is challenged due to large parallelism and complexity. We propose a 0.18 μm CMOS, GST memristor LSTM hardware architecture for near-sensor processing. The proposed system is validated in a forecasting problem based on Keras model.
Advanced Memory and Neural ComputingLow-power high-performance VLSI designAnalog and Mixed-Signal Circuit DesignLSTMrecurrent neural networksnear-sensor processing
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